Functional testing of PLC programs using FPGA-based Hardware-in-the-Loop simulation

Abstract

Programmable logic controllers are essential tools in industrial automation, but functional testing of control programs is often difficult if the controlled equipment is not available or cannot be shut down. The aim of the research is to create an FPGA-based Hardware-in-the-Loop (HIL) environment that allows real-time testing of PLC programs without the physical manufacturing equipment. The case study is based on a pump performance testing station model, which was developed in a MATLAB/Simulink environment and then emulates the physical behaviour of the equipment by running on an FPGA in the form of HDL code. The control logic runs on a Siemens S7-1200 PLC, while the Digilent Nexys A7 FPGA simulates the signals of the system's sensors and actuators. In the current development phase, the HIL system model and system architecture have been completed, and PLC communication integration and FPGA implementation are in progress. The presentation will introduce the system architecture, the steps of model creation and HDL generation, as well as the experiences gained during implementation. At the current stage of research, the goal of development is to create a flexible HIL platform capable of examining real-time communication between the PLC and the simulated process, thereby enabling early fault detection and functional testing of the control logic. The system's expandability means that it can later be adapted to test various industrial processes, such as pump and valve control systems. The expected result of the project is a HIL test platform capable of safely and reproducibly modelling the behaviour of real industrial environments. Based on the results of the research so far, the FPGA-based HIL approach used in industry can be promisingly adapted for realistic and reproducible testing of PLC control programs.